Product Summary

The AD7710SQ is a complete analog front end for low frequency measurement applications. The AD7710SQ accepts low level signals directly from a strain gage or transducer and outputs a serial digital word. It employs a sigma-delta conversion technique to realize up to 24 bits of no missing codes performance. The input signal is applied to a proprietary programmable gain front end based around an analog modulator. The AD7710SQ modulator output is processed by an on-chip digital filter. The first notch of this digital filter can be programmed via the on-chip control register allowing adjustment of the filter cutoff and settling time.

Parametrics

AD7710SQ absolute maximum ratings: (1)AVDD to DVDD: –0.3 V to +12 V; (2)AVDD to VSS: –0.3 V to +12 V; (3)AVDD to AGND: –0.3 V to +12 V; (4)AVDD to DGND: –0.3 V to +12 V; (5)DVDD to AGND: –0.3 V to +6 V; (6)DVDD to DGND: –0.3 V to +6 V; (7)VSS to AGND: +0.3 V to –6 V; (8)VSS to DGND: +0.3 V to –6 V; (9)Analog Input Voltage to AGND: VSS – 0.3 V to AVDD + 0.3 V; (10)Reference Input Voltage to AGND: VSS – 0.3 V to AVDD + 0.3 V; (11)REF OUT to AGND: –0.3 V to AVDD; (12)Digital Input Voltage to DGND: –0.3 V to AVDD + 0.3 V; (13)Digital Output Voltage to DGND: –0.3 V to DVDD + 0.3 V; (14)Operating Temperature Range Commercial (A Version): –40 to +85℃; Extended (S Version): –55 to +125℃; (15)Storage Temperature Range: –65 to +150℃; (16)Lead Temperature (Soldering, 10 secs): +300℃; (17)Power Dissipation (Any Package) to +75℃: 450 mW; (18)Derates Above +75℃: 6 mW/℃.

Features

AD7710SQ features: (1)Charge Balancing ADC: 24 Bits No Missing Codes; 60.0015% Nonlinearity; (2)Two-Channel Programmable Gain Front End: Gains from 1 to 128; Differential Inputs; (3)Low-Pass Filter with Programmable Filter Cutoffs; (4)Ability to Read/Write Calibration Coefficients; (5)Bidirectional Microcontroller Serial Interface; (6)Internal/External Reference Option; (7)Single or Dual Supply Operation; (8)Low Power (25 mW typ) with Power-Down Mode (7 mW typ).

Diagrams

AD7710SQ functional block diagram

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