Product Summary
The SP505ACF-L is a monolithic device that supports eight popular serial interface standards for DTE to DCE connectivity. The SP505ACF-L is fabricated using a low power BiCMOS process technology, and incorporates a Sipex patented (5,306,954) charge pump allowing +5V only operation. Seven drivers and seven receivers can be configured via software for any of the above interface modes at any time. The SP505ACF-L requires no additional external components for compliant operation for all of the eight modes of operation. All necessary termination is integrated within the SP505ACF-L and is switchable when V.35 drivers, V.35 receivers, and V.11 receivers are used. The SP505ACF-L can operate as either a DTE or DCE. Additional features with the SP505ACF-L include internal loopback that can be initiated in either single-ended or differential modes. While in loopback mode, driver outputs are internally connected to receiver inputs creating an internal signal path convenient for diagnostic testing. This eliminates the need for an external loopback plug. The SP505ACF-L also includes a latch enable pin with the driver and receiver address decoder. Tri-state ability for the driver and receiver outputs is controlled by supplying a 4-bit word into the address decoder. Seven drivers and one receiver in the SP505 include separate enable pins for added convenience. The SP505ACF-L is ideal for WAN serial ports in networking equipment such as routers, switches, DSU/CSU, and other access devices.
Parametrics
Absolute maximum ratings: (1)VCC: +7V; (2)Input Voltages of Logic: -0.3V to (VCC+0.5V); (3)Input Voltages of Drivers: -0.3V to (VCC+0.5V); (4)Input Voltages of Receivers: ±15.5V; (5)Output Voltages of Logic: -0.3V to (VCC+0.5V); (6)Output Voltages of Drivers: ±15V; (7)Output Voltages of Receivers: -0.3V to (VCC+0.5V); (8)Storage Temperature: -65℃ to +150℃; (9)Power Dissipation: 2000mW; (10)Package Derating of ΦJA: 46 ℃/W; (11)Package Derating of ΦJC: 16 ℃/W.
Features
Features:(1)+5V Only Operation; (2)Seven Drivers and Seven Receivers; (3)Driver and Receiver Tri-state Control; (4)Internal Transceiver Termination Resistors for V.11 and V.35 Protocols; (5)Loopback Self-Test Mode; (6)Software Selectable Protocol Selection; (7)Interface Modes Supported; (8)Improved ESD Tolerance for Analog I/Os; (9)High Differential Transmission Rates; (10)Compliant to NET1/2 and TBR2 Physical Layer Requirements.
Diagrams
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