XC95288XL-10TQG144I

3.3V CPLD, FastFLASH, in-system programming (ISP)

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PartNumber:: XC95288XL-10TQG144I

Brand:: Xilinx, Inc - Xilinx | Pack: TQFP | D/C: 09+

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Products Upload time: 2011-04-05

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Product Summary

The FastFLASH XC95288XL-10TQG144I is a 3.3V CPLD family targeted for high-performance, low-voltage applications in leading-edge communications and computing systems, where high device reliability and low power dissipation is important. Each XC9500XL device supports in-system programming (ISP) and the full IEEE Std 1149.1 (JTAG) boundary-scan, allowing superior debug and design iteration capability for small form-factor packages. The XC9500XL family is designed to work closely with the Xilinx Virtex, Spartan-XL and XC4000XL FPGA families, allowing system designers to partition logic optimally between fast interface circuitry and high-density general purpose logic. As shown in Table 1, logic density of the XC95288XL-10TQG144I devices ranges from 800 to 6400 usable gates with 36 to 288 registers, respectively. Multiple package options and associated I/O capacity are shown in Table 2. The XC95288XL-10TQG144I family members are fully pin-compatible, allowing easy design migration across multiple density options in a given package footprint.

Parametrics

Absolute maximum ratings: (1)Supply voltage relative to GND, VCC: –0.5 to 4.0V; (2)Input voltage relative to GND, VIN: –0.5 to 5.5V; (3)Voltage applied to 3-state output, VTS: –0.5 to 5.5V; (4)Storage temperature (ambient), TSTG: –65 to +150℃; (5)Junction temperature, TJ: +150℃.

Features

Features: (1)Optimized for high-performance 3.3V systems; (2)Four pin-compatible device densities; (3)Fast concurrent programming; (4)Slew rate control on individual outputs; (5)Enhanced data security features; (6)Excellent quality and reliability.