(Hong Kong)
Product Summary
The 74HC595N is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL(LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC595N is an 8-stage serial shift register with a storage register and 3-state outputs. The shift register and storage register have separate clocks. The 74HC595N has a serial input (DS) and a serial standard output (Q7’) for cascading. It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The storage register has 8 parallel 3-state bus driver outputs. The applications of the 74HC595N are Serial-to-parallel data conversion and Remote control holding register.
Parametrics
74HC595N absolute maximum ratings: (1)supply voltage:2.0V to 6.0V; (2)input voltage:0V to VCC; (3)output voltage:0V to VCC; (4)ambient temperature:-40℃ to +125℃; (5)input rise and fall time :VCC = 2.0V:1000ns, VCC = 4.5V:6.0ns to 500ns, VCC = 6.0V:400ns.
Features
74HC595N features: (1)8-bit serial input; (2)8-bit serial or parallel output; (3)Storage register with 3-state outputs; (4)Shift register with direct clear; (5)100 MHz (typical) shift out frequency; (6)ESD protection:HBM EIA/JESD22-A114-A exceeds 2000 V, MM EIA/JESD22-A115-A exceeds 200 V.
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
 |
 74HC595N,112 |
NXP Semiconductors |
Counter Shift Registers 8BIT SHIFT REGISTER W/OUTPUT LATCH |
Data Sheet |
|
|
||||||||||||
| Image | Part No | Mfg | Description | |
Pricing (USD) |
Quantity | ||||||||||||
 |
74HC |
Other |
|
Data Sheet |
Negotiable |
|
||||||||||||
|
74HC/HCT02 |
Other |
|
Data Sheet |
Negotiable |
|
||||||||||||
|
74HC/HCT03 |
Other |
|
Data Sheet |
Negotiable |
|
||||||||||||
|
74HC/HCT10 |
Other |
|
Data Sheet |
Negotiable |
|
||||||||||||
|
74HC/HCT107 |
Other |
|
Data Sheet |
Negotiable |
|
||||||||||||
|
74HC/HCT109 |
Other |
|
Data Sheet |
Negotiable |
|
||||||||||||
