KFG1216U2B-DIB6

Product Summary

The KFG1216U2B-DIB6 is an advanced generation, high-performance NAND-based Flash memory. It integrates on-chip a single-level-cell (SLC) NAND Flash Array memory with two independent data buffers, boot RAM buffer, a page buffer for the Flash array, and a one-time-programmable block. The combination of these memory areas enable high-speed pipelining of reads from host, BufferRAM, Page Buffer, and NAND Flash Array. Clock speeds up to 66MHz with a x16 wide I/O yields a 108MByte/second bandwidth. The KFG1216U2B-DIB6also includes a Boot RAM and boot loader. This enables the device to efficiently load boot code at device startup from the NAND Array without the need for off-chip boot device. One block of the NAND Array is set aside as an OTP memory area, and 1st Block (Block 0) can be used as OTP area. This area, available to the user, can be configured and locked with secured user information. On-chip controller interfaces enable the device to operate in systems without NAND Host controllers.

Parametrics

Absolute maximum ratings: (1)Voltage on any pin relative to VSS, Vcc, Vcc (for 3.3V): -0.5 to +4.6V; (2)Voltage on any pin relative to VSS, All Pins, VIN (for 3.3V): -0.5 to +4.6V; (3)Temperature Under Bias, Industrial, Tbias: -40 to +125℃; (4)Storage Temperature, Tstg: -65 to +150℃; (5)Short Circuit Output Current, IOS: 5mA; (6)Recommended Operating Temperature, TA (Extended Temp): -30 to +85℃; (7)Recommended Operating Temperature, TA (Industrial Temp.): -40 to +85℃.

Features

Features: (1)Design Technology: B die; (2)Supply Voltage: 3.3V(2.7V to 3.6V); (3)Host Interface: 16 bit; (4)5KB Internal BufferRAM: 1KB BootRAM, 4KB DataRAM; (5)SLC NAND Array: (2K+64)B Page Size, (128K+4K)B Block Size; (6)Host Interface Type: Synchronous Burst Read; (7)Programmable Burst Read Latency: Latency 3,4(Default),5,6 and 7; (8)Multiple Sector Read/Write: Up to 4 sectors using Sector Count Register; (9)Multiple Reset Modes: Cold/Warm/Hot/NAND Flash Core Reset; (10)Multi Block Erase: up to 64 Blocks; (11)Low Power Dissipation; (12)Reliable CMOS Floating-Gate Technology; (13)Voltage detector generating internal reset signal from Vcc; (14)Hardware reset input (RP); (15)Data Protection Modes; (16)User-controlled One Time Programmable(OTP) area; (17)Internal 2bit EDC / 1bit ECC; (18)Internal Bootloader supports Booting Solution in system; (19)Packaging: 512Mb products, 63ball, 9.5mm x 12mm x max 1.0mmt , 0.8mm ball pitch FBGA.

Diagrams