74LVC1G00GV

Si-gate CMOS device, SOT23, -0.5 to +6.5 V

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PartNumber:: 74LVC1G00GV

Brand:: NXP Semiconductors - nxp | Pack: SOT | D/C: 07+

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Products Upload time: 2011-07-04

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Product Summary

The 74LVC1G00GV is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. These features of 74LVC1G00GV allow the use of these devices in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. The 74LVC1G00GV is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the 74LVC1G00GV when it is powered down.

Parametrics

74LVC1G00GV absolute maximum ratings: (1)supply voltage: -0.5 to +6.5 V; (2)input diode current: -50 mA at VI < 0 V; (3)input voltage: -0.5 to +6.5 V; (4)output diode current: ±50 mA at VO > VCC or VO < 0 V; (5)output voltage: -0.5 to VCC + 0.5 V at active mode; (6)output diode current: ±50 mA at VO = 0 V to VCC; (7)VCC or GND current: ±100 mA; (8)storage temperature: -65 to +150 ℃; (9)power dissipation per package: 250 mW.

Features

74LVC1G00GV features: (1)Wide supply voltage range from 1.65 V to 5.5 V; (2)High noise immunity; (3)Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8B/JESD36 (2.7 V to 3.6 V); (4)±24 mA output drive (VCC = 3.0 V); (5)CMOS low power consumption; (6)Latch-up performance exceeds 250 mA; (7)Direct interface with TTL levels; (8)Inputs accept voltages up to 5 V; (9)Multiple package options; (10)ESD protection: HBM EIA/JESD22-A114-B exceeds 2000 V, MM EIA/JESD22-A115-A exceeds 200 V.; (11)Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃.